Silicon labs - C8051F410DK

Starting steps

Hardware setup

  • Check Jumpers
  • Connect the Debug adapter to the target board
  • Connect the USB cable to the Debug adapter
  • Connect the power jack to the board
  • (dissasambly in reverse order)

Create a new project

  • Project menu/new project
    • Device family: C8051F410x
    • Choose Project Name / Location
      The file location must not contain any non standard characters (like characters with accent)!
    • Project Type: Blank Project
    • Create an empty C file in the project directory
      File/New File... -> C source file
    • Add the c file to the Source Files branch
    • Right mouse button, and "Add *** to build"
      Add Basic.c to build
    • Copy this file into the project dir: C8051F410.h
      original location of the file: C:\Program Files\SDCC\include\mcs51
    • If needed: select the SDCC 3.x compiler tools in the Tool Chain Integration
      • Assembler: C:\Program Files\SDCC\bin\sdas8051.exe
      • Compiler: C:\Program Files\SDCC\bin\sdcc.exe
      • Linker: C:\Program Files\SDCC\bin\sdcc.exe

Configurint the microcontroller

  • Start Config Wizard 2
  • Select mircocontroller: C8051F41x / C8051F410
  • Switch the watchdog off: PCA / Module5/WDT / NOT: Enable Watchdog timer
  • Configure port IO
    • Enable Crossbar
    • Select used functions
    • Set putputs to Push-Pull (e.g. LEDs: P2.1, P2.3)
  • Save configuration
  • Copy the generated code into the c source file
    #include "C8051F410.h"
    // note: new config wizards may want to include differently named header file
    // Peripheral specific initialization functions,
    // Called from the Init_Device() function
    void PCA_Init()
        PCA0MD    &= ~0x40;
        PCA0MD    = 0x00;
    void Port_IO_Init()
        // ...
        P2MDOUT   = 0x0A;
        XBR1      = 0x40;
    // Initialization function for device,
    // Call Init_Device() from your main program
    void Init_Device(void)
  • Note: the 4.10 version of the ConfigWizard use this line in the generated code: #include "C8051F410_defs.h", this way the compiler will not find the correct definitions. This line should be edited or the file have to be renamed.
  • The generated code can be saved in an external file and referenced using the #include directive

Write the code

  • Define descriptive names for port I/O
    #define LED1 P2_1
    #define LED2 P2_3
    #define SW2 P1_4
    #define SW3 P1_5
  • Write the code
    void main()
    		if (!SW2)
    			LED1 = 1;
    			LED2 = 0;
    		if (!SW3)
    			LED1 = 0;
    			LED2 = 1;

Compile and download the code

  • Select the Debug adapter Options / Connection Options / C2 (once per project)
  • Connect (once)
  • Compile: Rebuild all (Ctrl+Shift+F7)
  • Select the OMF file (Project / Target Build Configuration / Absolute OMF file name / Select the only *.omf file)
  • Download Code (Alt+D)
  • Go (F5)

Additional info


# Description Default state Note
J1 Connect AIN0 to P1.7-re closed
J2 Analogue connectors -
J3 Connect AIN1 to P1.6-ra closed
J4 Debug adapter -
J5 Enable push buttons and LED-s all closed
J6 Connect IDAC1V to AIN1 open
J7 Power connection -
J8 RS232 port -
J9 Select the power of the 3,3 V stabilizer: VUNREG/5VEC3 VUNREG Option: 5VEC3: input from Debug adapter
J10 Enable 3VD closed
J11 Expansion port connector -
J12 Select VREGIN source (+3VD. 5VEC3. VREG); enable it closed: VREG, VREGIN_EN
J13 Connect P0.0 to IDAC0V open Needed if want to use analogue output
J14 Connect P0.1 to IDAC1V open Needed if want to use analogue output
J15 Connect VDD to the potentiometer open Needed if want to use the potentiometer
J16 Connect IDAC0V to AIN0-ra open
J17 Select VIO (5VEC3, +3VD, VREG, VDD); enable closed: VREG, VIO_EN
J18 Enable P0.1 to the connector closed Disconnect if using external xtal.
J19 Eneble VREG bekapcsolása not GND
J20 Power output -
J21 Enable and select VREG closed: VREG_, 5.25V
J22 Connect VREFIN to P1.2/VREf open
J23 VDD LED closed
J24 VREGIN LED closed
J25 Connect potentoimeter to AIN1 open
J26 Clock xtal open
J27 connect UART closed: TX, RX
open: RTS, CTS
J28 VREF capacitance wire
J29 enable VBAT closed
J30 VBAT source HOLD
J31 not populated open
J32 enable VDD closed
J33 VIO LED closed